Integrated circuit dies are fabricated en masse on silicon wafers using well-known techniques such as photolithography. Using these techniques, a pattern that defines the size and shape of the components and interconnects within a given layer of the integrated circuit die is applied to the wafer. The pattern applied to the wafer is laid out in an array, or matrix, of reticle images. A wafer stepper holds the pattern over a wafer and projects the pattern image of the reticle onto the wafer through a lens. The area on the wafer upon which the image is projected is defined as a stepper shot.
Referring now to prior art FIG. 1A, a side view of a stepper 100 is shown. Stepper 100 includes a light source 122, masking blades 124, a reticle 126, a lens 128, and a stage 112. The light source 122 projects light through an opening 126a of masking blades 124, through the transparent portion of a pattern 126a on reticle 126, through lens 128 and onto a wafer 133 located on the stage 112. By doing so, the pattern 126a of the reticle 126 is reproduced on the wafer 133, typically at a 5:1 reduction. A pattern located on an inner, or center, portion of the reticle 126 passes through a center portion 128a of lens 128. Similarly, a pattern 126b located on an outer, or peripheral, portion of the reticle 126 passes through an outer portion 128b of lens 128.
The integrated circuit is essentially built-up by forming on the wafer 133 a multitude of interconnecting layers, one layer on top of another. Because the layers interconnect, a need arises for ensuring that the patterns on wafer 133 are accurately positioned and formed. Conventional methods rely on precise alignment of the wafer 133, the stage 112, the lens 128 and the reticle 126 in order to accurately fabricate an integrated circuit.
Accurate formation of an image on a wafer using photolithography can be affected by several error-causing variables. These variables include rotational alignment error, translational alignment error, and lens distortion error, among others. Each one of these error-causing variables can be corrected by a different part of the stepper. It is desirable to segregate the types of errors and measure them independently so that the error measurements are not confounded and so that the resulting corrections for each variable will not be conflicting and counterproductive.
The rotational alignment error, caused by rotational movement of the reticle 126 relative to the wafer 133 (or vice versa), is of particular interest with regard to the discussion herein. As described above, it is desirable to segregate rotational error from the other error-causing variables in order to compensate for the true measurement of rotational error.
With reference now to Prior Art FIG. 2A, alignment targets 14 and 16 are placed on the wafer 133 in order to ensure that the final alignment of the wafer 133 and the reticle 126 (FIG. 1) is correct before the integrated circuit is formed. The alignment targets 14 and 16 are located within the scribe line region of a stepper shot 12. A stepper shot 12 may be comprised of multiple integrated circuit dies or a single die. Multiple stepper shots are performed until the entire wafer 133 is exposed.
Prior Art FIG. 2A illustrates an arrangement using only two alignment targets 14 and 16. Alignment target 14 is used for acquiring the y-direction offset, and alignment target 16 is used for acquiring the x-direction offset. In the prior art, a deviation of the alignment targets 14 and 16 from their expected location or orientation (as defined in the controlling software) is interpreted as a translational error when, in actuality, it may be a rotational error or a lens distortion error.
In order to perform a measurement of rotational error in the prior art, an additional alignment target 18 is required as shown by Prior Art FIG. 2B. Prior art design guides specify that alignment target 18 must be placed in a location where it will not interfere with the y-direction measurement mark (e.g., alignment target 14) on the y-coordinate. Consequently, alignment target 14 and alignment target 18 are not aligned with each other and are separated in the y-direction by an offset 20. The amount of offset 20 is measured to determine the amount of rotational error. That is, for example, the amount of offset 20 is known for the case where there is no rotational error. If stepper shot 12 is rotated clockwise, the amount of offset 20 will increase relative to this amount, and the amount of the increase can be translated to a measurement of rotational error.
Thus, to determine the amount of rotational error in the prior art, all three alignment targets 14, 16 and 18 need to be acquired and the deviation from their expected positional values measured. In some stepper implementations, the targets are acquired for multiple shots in order to obtain the measurements needed to determine rotational error. Accordingly, the alignment targets 14, 16 and 18 may need to be acquired and measured multiple times per wafer. The time and the processing effort needed to acquire the targets, obtain measurements, and calculate rotational error can limit the throughput of the stepper.
Furthermore, proper focusing of the alignment scope used to acquire targets 14, 16 and 18 is required in order to acquire the targets with the precision necessary for calculating rotational error. This focusing may be performed for every wafer or at some other frequency (e.g., every other wafer, every fifth wafer, etc.). At any rate, the time needed to complete the focusing task can further limit the throughput of the stepper.
Accordingly, what is needed is a method and/or system that can properly compensate for rotational error in the integrated circuit fabrication process. What is also needed is a method and/or system that can satisfy the above need and that can save measurement and processing time, thereby potentially improving stepper throughput. The present invention provides a novel solution to the above needs.